There has been known an AMI (Amplified MOS Imager) as one among various types of solid-state image pickup devices. The AMI comprises one photodiode and three NMOS transistors. During a photoelectric conversion process in the AMI, the potential of the photodiode is lowered in conjunction with the generation of photoelectrically converted signals (electrons), and the potential change after amplified by one of the MOS transistors is read out as current.
FIG. 7 shows the circuit of the above. The AMI circuit comprises one photodiode, and three NMOS transistors or reset, select and amplifier transistors. When the reset transistor TR is turned on to apply a reverse bias to the photodiode PD, a depletion layer is extended to provide an increased junction capacitance, and a photodiode voltage (hereinafter referred to as PD voltage) of the photodiode PD is set at a reset voltage by charging the junction capacitance.
After the reset operation, if both the reset transistor TR and the select transistor TS are in their OFF state, charges accumulated on the junction capacitance will be confined and held therein. Nevertheless, some leak current will be generated around the interface of the PN junction of the photodiode PD. When light is incident on the photodiode PD, the resulting recombination of electrons and holes causes decline in the PD voltage. In order to read out the PD voltage during this process, the transistor TS is turned on to provide an output on all OUT terminal. Before the outputting, the PD voltage signal has been amplified through the amplifier transistor TA.
One of features of the AMI can be describes as follows. The reset voltage obtained from a switching operation of the reset transistor TR (the term “switching operation” herein means an operation of applying a pulsed voltage øR for controlling the gate voltage from 0 (zero) to VDD to turn on/off the reset transistor TR completely) is calculated as follows.VDD(=øR)−Vth  (1)
Thus, the reset voltage is restricted by Vth in the switching operation.
Then, the PD voltage is output from source of the amplifier transistor TA because it is used as a source follower, and consequently the output voltage is additionally lowered by a factor of Vth. That is, the output is lowered by a factor of 2×Vth, as shown in FIG. 7.
For example, assuming that the select transistor TS is operated in the non-saturation region, and the voltage drop in the select transistor is 0.1 V, the AMI has the following output.VDD−2Vth−0.1 V  (2)Given that VDD is 3.3 V, and Vth is 0.7 V, the output is calculated as follows.3.3−2×0.7 V−0.1 V=1.8 V
That is, the AMI has a dynamic range of 1.8 V.
An A/D converter is one of essential components of a detect sensor such as image sensors. For example, if a 10-bit A/D converter is arranged in a subsequent stage of the AMI, the output 1.8 V from the AMI have to be divided by 1024 (=210=10 bits). Thus, the comparison voltage of the A/D converter will be set at 18/1024=1.75 mV. The malfunction of the A/D converter is reduced as the comparison voltage is increased. From this point of view, it is desired to extend the output range from the pixel section so as to allow the comparison voltage to be set higher.
Generally, a sensor based on amplified-type image pickup devices involve a serious problem due to variation in the threshold voltage (Vth), such that when an output from the sensor is displayed as an image on a display screen, a stripe pattern appears on a specific portion of the screen and stays at the same position with uneven brightness. This is a typical noise, so-called “Fixed Pattern Noise”, in the amplified-type image pickup devices. For this reason, a conventional detect sensor such as image sensors has been required to take measures such as performing a correlated double sampling (CDS) using a noise canceling circuit, or employing a process having less variation in the threshold voltage.
The operational timing of the AMI will be described below with reference to FIG. 8 which shows transistor switching timings, PD voltage, and output voltage. The reset transistor TR in FIG. 7 is first turned on to increase the PD voltage of the photodiode PD up to a reset voltage. Then, the reset transistor TR is turned off. If no light is incident on the photodiode, the PD voltage will be maintained a potential of the reset voltage because of no photoelectric conversion. When the select transistor TS is turned on in this state, the PD voltage is amplified by the amplifier transistor TA, and the amplified voltage signal is read out.
Upon receiving light, the photodiode PD absorbs photoelectrically converted electrons in response to the incident light, and the PD voltage set at the reset voltage is gradually lowered. In readout of this voltage, the select transistor TS is turned on in the same manner as above to read out a voltage signal amplified through the amplifier transistor TR. For example, if the AMI is operated at its normal frame frequency (60 Hz), the signal can be read out after 1/60 seconds from the completion of the reset operation in the reset transistor TR.
The respective outputs in one case where the photodiode PD receives light and in another case where the photodiode PD receives no light will be considered. FIG. 9 is an operational timing chart in which respective PD voltages and output voltages in separated time periods of dark without incident light and bright with incident light are added to the timing chart in FIG. 8. The reset transistor TR and the select transistor TS are driven in the same cycle as that in FIG. 8. In the dark time period, ideally the PD voltage should be maintained a potential of the reset voltage. However, in actual devices, the PD voltage will be slightly lowered due to a leak occurring in the interface of a diffusion layer of the photodiode and a resulting small current flowing as a dark current (leak current). An output during this process is read out. In the bright time period, the PD voltage is gradually lowered due to the outflow of accumulated charges in the junction capacitance of the photodiode in response to incident light. An output during this process is also read out. In a subsequent stage of the pixel circuit, the potential difference between the readout outputs can be determined as a photoelectric conversion value.
A CMOS type solid-state image pickup device has been actively developed for reasons that it has lower power consumption than that in CCD solid-state image pickup devices and no need for any dedicated process as in CCDs. A CMOS process is already in the development stage of the submicron order of a gate length, and its integration is accelerated. In such developments, process-related variations become one of critical problems, and it is further required to clear various problems such as noise while achieving high sensitivity. In the AMI circuit serving as an amplified-type image pickup device, the fixed pattern noise (FPN) caused by variation in the threshold voltage is disadvantageous because the amplifier transistor is used as a source follower. A standard CMOS process involves a threshold voltage variation of at least 10 m Vp-p. In the amplified-type image pickup device, such a threshold voltage variation is directly associated with an output variation. In addition, since the PD voltage is set at the reset voltage by the source follower of the reset transistor RT, it is lowered by a factor of 2×Vth (threshold voltage) when read out as an output, resulting in a narrowed dynamic range.